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| IRFD320 Data Sheet July 1999 File Number 2325.4 0.5A, 400V, 1.800 Ohm, N-Channel Power MOSFET This N-Channel enhancement mode silicon gate power field effect transistor is an advanced power MOSFET designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly developmental type TA17404. Features * 0.5A, 400V * rDS(ON) = 1.800 * Single Pulse Avalanche Energy Rated * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards" Ordering Information PART NUMBER IRFD320 PACKAGE HEXDIP BRAND IRFD320 Symbol D NOTE: When ordering, use the entire part number. G S Packaging HEXDIP DRAIN GATE SOURCE 4-299 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999 IRFD320 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified IRFD320 400 400 0.5 2.0 20 1.0 0.008 100 -55 to 150 300 260 UNITS V V A A V W W/oC mJ oC oC oC Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications PARAMETER TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS TEST CONDITIONS ID = 250A, VGS = 0V (Figure 9) VGS = VDS, ID = 250A VDS = Rated BVDSS, VGS = 0V VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC MIN 400 2.0 0.5 1.7 VGS = 10V, ID = 0.5A, VDS = 0.8 x Rated BVDSS , IG(REF) = 1.5A (Figure 13), Gate Charge is Essentially Independent of Operating Temperature VDS = 25V, VGS = 0V, f = 1MHz (Figure 10) Measured From Drain Lead, 2.0mm (0.08in) from Package to Center of Die Measured From the Source Lead, 2.0mm (0.08in) from Package to Source Bonding Pad Modified MOSFET Symbol Showing the Internal Device Inductances D LD G LS S TYP 1.5 2.0 20 25 50 25 12 6.0 6.0 455 100 20 4.0 MAX 4.0 25 250 100 1.8 40 50 100 50 15 - UNITS V V A A A nA S ns ns ns ns nC nC nC pF pF pF nH Drain to Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current On-State Drain Current (Note 2) Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) Gate to Source Charge Gate to Drain "Miller" Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Internal Drain Inductance ID(ON) IGSS rDS(ON) gfs td(ON) tr td(OFF) tf Qg(TOT) Qgs Qgd CISS COSS CRSS LD VDS > ID(ON) x rDS(ON)MAX, VGS = 10V VGS = 20V ID = 0.25A, VGS = 10V (Figures 7, 8) VDS 10V, ID = 2.0A (Figure 11) VDD = 0.5 x Rated BVDSS, ID 0.5A, RG = 9.1, VGS = 10V, RL = 398 for VDSS = 200V MOSFET Switching Times are Essentially Independent of Operating Temperature - Internal Source Inductance LS - 6.0 - nH Thermal Resistance Junction to Ambient RJA Free Air Operation - - 120 oC/W 4-300 IRFD320 Source to Drain Diode Specifications PARAMETER Continuous Source to Drain Current Pulse Source to Drain Current (Note 3) SYMBOL ISD ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Rectifier G D MIN - TYP - MAX 0.5 2.0 UNITS A A S Source to Drain Diode Voltage (Note 2) Reverse Recovery Time Reverse Recovery Charge NOTES: VSD trr QRR TJ = 25oC, ISD = 2.0A, VGS = 0V (Figure 12) TJ = 150oC, ISD = 2.0A, dISD/dt = 100A/s TJ = 150oC, ISD = 2.0A, dISD/dt = 100A/s - 450 3.1 1.6 - V ns C 2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. 4. VDD = 40V, starting TJ = 25oC, L = 29.09mH, RG = 50, peak IAS = 2.5A. Typical Performance Curves 1.2 POWER DISSIPATION MULTIPLIER 1.0 0.8 Unless Otherwise Specified 0.5 ID, DRAIN CURRENT (A) 0.3 0.6 0.4 0.1 0.2 0 0 25 50 75 100 TC , CASE TEMPERATURE (oC) 125 150 0 25 50 75 100 125 150 TC, CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 2 1 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 10s 100s 1ms 0.1 10ms 100ms 00.1 TJ = MAX RATED TC = 25oC SINGLE PULSE 0.001 1 10 100 VDS, DRAIN TO SOURCE VOLTAGE (V) 1s DC 1000 6 5 4 3 VGS = 6.0V VGS = 10V PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = 5.5V VGS = 5.0V 2 VGS = 4.5V VGS = 4.0V 1 0 0 100 200 300 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 3. FORWARD BIAS SAFE OPERATING AREA FIGURE 4. OUTPUT CHARACTERISTICS 4-301 IRFD320 Typical Performance Curves 5 VGS = 6.0V ID, DRAIN CURRENT (A) 4 VGS = 10V VGS = 5.5V ID, DRAIN CURRENT (A) VGS = 5.0V PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = 4.5V 1 VGS = 4.0V 5 4 3 TJ = 125oC 2 TJ = 25oC TJ = -55oC 1 0 Unless Otherwise Specified (Continued) 6 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 3 2 0 0 4 8 12 16 20 VDS, DRAIN TO SOURCE VOLTAGE (V) 0 1 2 3 4 5 VGS, GATE TO SOURCE VOLTAGE (V) 6 FIGURE 5. SATURATION CHARACTERISTICS 6 5 ON RESISTANCE () 4 VGS = 10V VGS = 20V 3 2 1 0 0 2 4 6 8 ID, DRAIN CURRENT (A) 10 12 2s PULSE TEST DUTY CYCLE = 0.5% MAX 2.2 NORMALIZED DRAIN TO SOURCE ON RESISTANCE FIGURE 6. TRANSFER CHARACTERISTICS rDS(ON), DRAIN TO SOURCE 1.8 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = 10V, ID = 0.25A 1.4 1.0 0.6 0.2 -40 0 40 80 120 TJ , JUNCTION TEMPERATURE (oC) NOTE: Heating effect of 2s pulse is minimal. FIGURE 7. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT FIGURE 8. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 1.25 ID = 250A NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1.15 C, CAPACITANCE (pF) 1000 800 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGD 1.05 600 CISS 400 COSS CRSS 0.95 0.85 200 0.75 -40 0 40 80 120 160 0 0 TJ , JUNCTION TEMPERATURE (oC) 10 30 40 20 VDS, DRAIN TO SOURCE VOLTAGE (V) 50 FIGURE 9. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE FIGURE 10. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 4-302 IRFD320 Typical Performance Curves 5 ISD, SOURCE TO DRAIN CURRENT (A) gfs, TRANSCONDUCTANCE (S) PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 4 TJ = -55oC TJ = 25oC TJ = 125oC 2 Unless Otherwise Specified (Continued) 100 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX TJ = 25oC TJ = 150oC 3 10 TJ = 150oC TJ = 25oC 1 0 0 1 2 3 4 I D , DRAIN CURRENT (A) 5 6 1 0 1 2 3 VSD, SOURCE TO DRAIN VOLTAGE (V) 4 FIGURE 11. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 12. SOURCE TO DRAIN DIODE VOLTAGE 20 VGS, GATE TO SOURCE VOLTAGE (V) ID = 0.5A 15 VDS = 80V VDS = 200V VDS = 320V 10 5 0 0 4 8 12 Qg, GATE CHARGE (nC) 16 20 FIGURE 13. GATE TO SOURCE VOLTAGE vs GATE CHARGE Test Circuits and Waveforms VDS BVDSS L VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG IAS VDD tP + VDS VDD - 0V IAS 0.01 0 tAV FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS 4-303 IRFD320 Test Circuits and Waveforms (Continued) tON td(ON) tr RL VDS 90% tOFF td(OFF) tf 90% + RG DUT - VDD 0 10% 90% 10% VGS VGS 0 10% 50% PULSE WIDTH 50% FIGURE 16. SWITCHING TIME TEST CIRCUIT FIGURE 17. RESISTIVE SWITCHING WAVEFORMS CURRENT REGULATOR VDS (ISOLATED SUPPLY) VDD SAME TYPE AS DUT Qg(TOT) Qgd Qgs D VDS VGS 12V BATTERY 0.2F 50k 0.3F G DUT 0 IG(REF) 0 IG CURRENT SAMPLING RESISTOR S VDS ID CURRENT SAMPLING RESISTOR IG(REF) 0 FIGURE 18. GATE CHARGE TEST CIRCUIT FIGURE 19. GATE CHARGE WAVEFORMS All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029 4-304 |
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